#include "ch32x035.h"
#include "DevicesWatchDog.h"


void vWatchdogInit(void)
{
    IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable);

    /* enable write access to FWDGT_PSC and FWDGT_RLD registers.
        FWDGT counter clock: (HSI/1024) / 256 = 48000000 / 1024 / 256 = 183.10546857 Hz */
    IWDG_SetPrescaler(IWDG_Prescaler_256);
    IWDG_SetReload(8 * 48000000 / 1024 / 256);

    /* reload the counter of FWDGT */
    IWDG_ReloadCounter();

    IWDG_Enable();
}

void vWatchdogReload(void)
{
    /* reload the counter of FWDGT */
    IWDG_ReloadCounter();
}
